led_timing.h

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#pragma once
 
#include "fl/stl/stdint.h"
#include "fl/stl/noexcept.h"
#include "fl/chipsets/clockless_encoder.h"  // ClocklessEncoder enum (used by UCS7604 timings)
 
// ============================================================================
// Overclock Factor Configuration
// ============================================================================
 
// Allow overclocking of the clockless family of LEDs. 1.2 would be
// 20% overclocking. In tests WS2812 can be overclocked at 20%, but
// various manufacturers may be different. This is a global value
// which is overridable by each supported chipset.
 
#ifdef FASTLED_LED_OVERCLOCK
#warning "FASTLED_LED_OVERCLOCK has been changed to FASTLED_OVERCLOCK. Please update your code."
#define FASTLED_OVERCLOCK FASTLED_LED_OVERCLOCK
#endif
 
#ifndef FASTLED_OVERCLOCK
#define FASTLED_OVERCLOCK 1.0
#else
#ifndef FASTLED_OVERCLOCK_SUPPRESS_WARNING
#warning "FASTLED_OVERCLOCK is now active, #define FASTLED_OVERCLOCK_SUPPRESS_WARNING to disable this warning"
#endif
#endif
 
// Per-chipset overclock factors (default to global FASTLED_OVERCLOCK)
// These allow fine-grained control of overclocking for specific chipsets
 
#ifndef FASTLED_OVERCLOCK_WS2812
#define FASTLED_OVERCLOCK_WS2812 FASTLED_OVERCLOCK
#endif
 
#ifndef FASTLED_OVERCLOCK_WS2811
#define FASTLED_OVERCLOCK_WS2811 FASTLED_OVERCLOCK
#endif
 
#ifndef FASTLED_OVERCLOCK_WS2813
#define FASTLED_OVERCLOCK_WS2813 FASTLED_OVERCLOCK
#endif
 
#ifndef FASTLED_OVERCLOCK_WS2815
#define FASTLED_OVERCLOCK_WS2815 FASTLED_OVERCLOCK
#endif
 
#ifndef FASTLED_OVERCLOCK_SK6822
#define FASTLED_OVERCLOCK_SK6822 FASTLED_OVERCLOCK
#endif
 
#ifndef FASTLED_OVERCLOCK_SK6812
#define FASTLED_OVERCLOCK_SK6812 FASTLED_OVERCLOCK
#endif
 
namespace fl {
 
// The `ClocklessEncoder` enum used by certain timings (e.g., UCS7604) is
// declared in `fl/chipsets/clockless_encoder.h` (included above). This file
// stays focused on bit-period timing only.
 
// ============================================================================
// Centralized Nanosecond Timing Definitions
// ============================================================================

struct ChipsetTiming {
    u32 T1;        
    u32 T2;        
    u32 T3;        
    u32 RESET;     
    const char* name;   
};
 
// ============================================================================
// Fast-Speed Chipsets (800kHz - 1600kHz range)
// ============================================================================

struct TIMING_GE8822_800KHZ {
    enum : u32 {
        T1 = 350,
        T2 = 660,
        T3 = 350,
        RESET = 0
    };
};
 
// User-overridable WS2812 timing macros
// These allow compile-time customization for WS2812 variants (e.g., V5B)
#ifndef FASTLED_WS2812_T1
#define FASTLED_WS2812_T1 250
#endif
 
#ifndef FASTLED_WS2812_T2
#define FASTLED_WS2812_T2 625
#endif
 
#ifndef FASTLED_WS2812_T3
#define FASTLED_WS2812_T3 375
#endif

struct TIMING_WS2812_800KHZ {
    enum : u32 {
        T1 = FASTLED_WS2812_T1,
        T2 = FASTLED_WS2812_T2,
        T3 = FASTLED_WS2812_T3,
        RESET = 280
    };
    static constexpr const char* name() FL_NO_EXCEPT { return "WS2812_800KHZ"; }
};

using WS2812ChipsetTiming = TIMING_WS2812_800KHZ;
 
// User-overridable WS2812B-V5 timing macros
// These allow compile-time customization for WS2812B-V5 variants
#ifndef FASTLED_WS2812B_V5_T1
#define FASTLED_WS2812B_V5_T1 225
#endif
 
#ifndef FASTLED_WS2812B_V5_T2
#define FASTLED_WS2812B_V5_T2 355
#endif
 
#ifndef FASTLED_WS2812B_V5_T3
#define FASTLED_WS2812B_V5_T3 645
#endif

struct TIMING_WS2812B_MINI_V3 {
    enum : u32 {
        T1 = FASTLED_WS2812B_V5_T1,
        T2 = FASTLED_WS2812B_V5_T2,
        T3 = FASTLED_WS2812B_V5_T3,
        RESET = 280   // WS2812B-V5 reset/latch time per datasheet
    };
};

using TIMING_WS2812B_V5 = TIMING_WS2812B_MINI_V3;

struct TIMING_WS2812_800KHZ_LEGACY {
    enum : u32 {
        T1 = 320,
        T2 = 320,
        T3 = 640,
        RESET = 280
    };
};

struct TIMING_WS2813 {
    enum : u32 {
        T1 = 320,
        T2 = 320,
        T3 = 640,
        RESET = 300
    };
};

struct TIMING_WS2814 {
    enum : u32 {
        T1 = 320,
        T2 = 320,
        T3 = 640,
        RESET = 300
    };
};

struct TIMING_WS2818 {
    enum : u32 {
        T1 = 300,
        T2 = 300,
        T3 = 600,
        RESET = 300
    };
};

struct TIMING_SK6812 {
    enum : u32 {
        T1 = 300,
        T2 = 600,
        T3 = 300,
        RESET = 80
    };
};

struct TIMING_LC8816E {
    enum : u32 {
        T1 = 300,
        T2 = 600,
        T3 = 300,
        RESET = 80
    };
};

struct TIMING_SK6822 {
    enum : u32 {
        T1 = 375,
        T2 = 1000,
        T3 = 375,
        RESET = 0
    };
};

struct TIMING_UCS1903B_800KHZ {
    enum : u32 {
        T1 = 400,
        T2 = 450,
        T3 = 450,
        RESET = 0
    };
};

struct TIMING_UCS1904_800KHZ {
    enum : u32 {
        T1 = 400,
        T2 = 400,
        T3 = 450,
        RESET = 0
    };
};

struct TIMING_UCS2903 {
    enum : u32 {
        T1 = 250,
        T2 = 750,
        T3 = 250,
        RESET = 0
    };
};

struct TIMING_TM1809_800KHZ {
    enum : u32 {
        T1 = 350,
        T2 = 350,
        T3 = 450,
        RESET = 0
    };
};

struct TIMING_TM1908 {
    enum : u32 {
        T1 = 240,
        T2 = 240,
        T3 = 350,
        RESET = 80
    };
    static constexpr ClocklessEncoder ENCODER =
        ClocklessEncoder::CLOCKLESS_ENCODER_TM1908;
};

struct TIMING_TM1812_RGBWW_800KHZ {
    enum : u32 {
        T1 = 400,
        T2 = 450,
        T3 = 400,
        RESET = 24
    };
    static constexpr ClocklessEncoder ENCODER =
        ClocklessEncoder::CLOCKLESS_ENCODER_TM1812_RGBWW;
};

struct TIMING_TM1829_800KHZ {
    enum : u32 {
        T1 = 340,
        T2 = 340,
        T3 = 550,
        RESET = 500
    };
};

struct TIMING_TM1829_1600KHZ {
    enum : u32 {
        T1 = 100,
        T2 = 300,
        T3 = 200,
        RESET = 500
    };
};

struct TIMING_LPD1886_1250KHZ {
    enum : u32 {
        T1 = 200,
        T2 = 400,
        T3 = 200,
        RESET = 0
    };
};

struct TIMING_PL9823 {
    enum : u32 {
        T1 = 350,
        T2 = 1010,
        T3 = 350,
        RESET = 0
    };
};

struct TIMING_SM16703 {
    enum : u32 {
        T1 = 300,
        T2 = 600,
        T3 = 300,
        RESET = 0
    };
};

struct TIMING_GS1903 {
    enum : u32 {
        T1 = 300,
        T2 = 600,
        T3 = 300,
        RESET = 280
    };
};

struct TIMING_SM16824E {
    enum : u32 {
        T1 = 300,
        T2 = 600,
        T3 = 300,
        RESET = 200
    };
};
 
// ============================================================================
// Medium-Speed Chipsets (400kHz - 600kHz range)
// ============================================================================

struct TIMING_WS2811_400KHZ {
    enum : u32 {
        T1 = 500,   // T0H: 500ns (datasheet: 500ns ±150ns)
        T2 = 700,   // T1H - T0H: 700ns (T1H=1200ns per datasheet)
        T3 = 1300,  // T1L: 1300ns (datasheet: 1300ns ±150ns)
        RESET = 280 // Reset time: 280µs (>50µs per datasheet)
    };
};

struct TIMING_WS2815 {
    enum : u32 {
        T1 = 250,
        T2 = 1090,
        T3 = 550,
        RESET = 0
    };
};

struct TIMING_UCS1903_400KHZ {
    enum : u32 {
        T1 = 500,
        T2 = 1500,
        T3 = 500,
        RESET = 0
    };
};

struct TIMING_DP1903_400KHZ {
    enum : u32 {
        T1 = 800,
        T2 = 1600,
        T3 = 800,
        RESET = 0
    };
};

struct TIMING_TM1803_400KHZ {
    enum : u32 {
        T1 = 700,
        T2 = 1100,
        T3 = 700,
        RESET = 0
    };
};

struct TIMING_GW6205_400KHZ {
    enum : u32 {
        T1 = 800,
        T2 = 800,
        T3 = 800,
        RESET = 0
    };
};

struct TIMING_UCS1912 {
    enum : u32 {
        T1 = 250,
        T2 = 1000,
        T3 = 350,
        RESET = 0
    };
};
 
// ============================================================================
// Legacy/Special Chipsets
// ============================================================================

struct TIMING_WS2811_800KHZ_LEGACY {
    enum : u32 {
        T1 = 250,   // T0H: 250ns (half of 500ns @ 400kHz)
        T2 = 350,   // T1H - T0H: 350ns (T1H=600ns, half of 1200ns @ 400kHz)
        T3 = 650,   // T1L: 650ns (half of 1300ns @ 400kHz)
        RESET = 280 // Reset time: 280µs (>50µs per datasheet)
    };
};

struct TIMING_GW6205_800KHZ {
    enum : u32 {
        T1 = 400,
        T2 = 400,
        T3 = 400,
        RESET = 0
    };
};

struct TIMING_DP1903_800KHZ {
    enum : u32 {
        T1 = 400,
        T2 = 1000,
        T3 = 400,
        RESET = 0
    };
};
 
// ============================================================================
// RGBW Chipsets (16-bit color depth variants)
// ============================================================================

struct TIMING_TM1814 {
    enum : u32 {
        T1 = 360,
        T2 = 600,
        T3 = 340,
        RESET = 300
    };
};
 
// ============================================================================
// UCS7604 Special 16-Bit RGBW Controller
// ============================================================================

struct TIMING_UCS7604_800KHZ {
    enum : u32 {
        T1 = 400,
        T2 = 400,
        T3 = 450,
        RESET = 280
    };
    static constexpr ClocklessEncoder ENCODER = ClocklessEncoder::CLOCKLESS_ENCODER_UCS7604_16BIT;
};

struct TIMING_UCS7604_1600KHZ {
    enum : u32 {
        T1 = 200,
        T2 = 200,
        T3 = 225,
        RESET = 280
    };
    static constexpr ClocklessEncoder ENCODER = ClocklessEncoder::CLOCKLESS_ENCODER_UCS7604_16BIT_1600;
};

struct TIMING_UCS7604_8BIT_800KHZ {
    enum : u32 {
        T1 = 400,
        T2 = 400,
        T3 = 450,
        RESET = 280
    };
    static constexpr ClocklessEncoder ENCODER = ClocklessEncoder::CLOCKLESS_ENCODER_UCS7604_8BIT;
};
 
// ============================================================================
// Helper Functions
// ============================================================================

template <typename TIMING>
constexpr ChipsetTiming to_runtime_timing() FL_NO_EXCEPT {
    return {TIMING::T1, TIMING::T2, TIMING::T3, TIMING::RESET, "timing"};
}

constexpr u32 get_bit_period_ns(const ChipsetTiming& timing) FL_NO_EXCEPT {
    return timing.T1 + timing.T2 + timing.T3;
}

constexpr u32 get_timing_t1(const ChipsetTiming& timing) FL_NO_EXCEPT {
    return timing.T1;
}

constexpr u32 get_timing_t2(const ChipsetTiming& timing) FL_NO_EXCEPT {
    return timing.T2;
}

constexpr u32 get_timing_t3(const ChipsetTiming& timing) FL_NO_EXCEPT {
    return timing.T3;
}

const ChipsetTiming* get_timing_by_name(const char* name) FL_NO_EXCEPT;
 
}  // namespace fl