18 chipset,
fl::move(encodedData), pixelFormat);
28 pin, timing,
fl::move(encodedData), pixelFormat);
71 size_t targetSize = dst.size();
75 if (targetSize < currentSize) {
88 size_t paddingSize = targetSize - currentSize;
89 if (paddingSize > 0) {
90 fl::fill(dst.begin(), dst.begin() + paddingSize,
u8(0));
~ChannelData()
Destructor with debug logging.
const ChipsetTimingConfig & getTiming() const FL_NO_EXCEPT
Get the timing configuration (clockless chipsets only)
ChannelData(const ChipsetVariant &chipset, fl::vector_psram< u8 > &&encodedData, ChannelPixelFormat pixelFormat) FL_NO_EXCEPT
Private constructor - variant-based (modern API)
static ChannelDataPtr create(const ChipsetVariant &chipset, fl::vector_psram< u8 > &&encodedData=fl::vector_psram< u8 >(), ChannelPixelFormat pixelFormat=ChannelPixelFormat::RGB) FL_NO_EXCEPT
Create channel transmission data (modern variant-based API)
void writeWithPadding(fl::span< u8 > dst) FL_NO_EXCEPT
Write encoded data with padding to destination buffer.
ChipsetVariant mChipset
Chipset configuration (clockless or SPI)
ChannelPixelFormat mPixelFormat
Explicit byte layout for encoded data.
fl::vector_psram< u8 > mEncodedData
Encoded transmission bytes (PSRAM)
int getPin() const FL_NO_EXCEPT
Get the GPIO pin number.
PaddingGenerator mPaddingGenerator
Optional padding generator for block-size alignment.
const T * data() const FL_NO_EXCEPT
Channel transmission data - lightweight DTO for driver transmission.
Centralized logging categories for FastLED hardware interfaces and subsystems.
constexpr remove_reference< T >::type && move(T &&t) FL_NO_EXCEPT
shared_ptr< T > make_shared(Args &&... args) FL_NO_EXCEPT
void fill(Iterator first, Iterator last, const T &value) FL_NO_EXCEPT
u8 u8 fract8 blur_amount FL_NO_EXCEPT
fl::variant< ClocklessChipset, SpiChipsetConfig > ChipsetVariant
void * memcopy(void *dest, const void *src, size_t n) FL_NO_EXCEPT
ChannelPixelFormat
Pixel byte layout carried by encoded channel data.
Base definition for an LED controller.
Runtime bit-period timing for a clockless chipset.
Clockless chipset configuration (single data pin)
SPI chipset configuration (data + clock pins)