◆ ChipsetTimingConfig() [2/2]

fl::ChipsetTimingConfig::ChipsetTimingConfig	(	u32	t1,
		u32	t2,
		u32	t3,
		u32	reset,
		const char *	name = "UNNAMED CHIPSET" )

inlineconstexpr

Definition at line 25 of file chipset_timing_config.h.

27 : t1_ns(t1), t2_ns(t2), t3_ns(t3), reset_us(reset), name(name) {}

u32 t1_ns

T0H: High time for bit 0 (nanoseconds)

Definition chipset_timing_config.h:29

u32 t2_ns

T1H-T0H: Additional high time for bit 1 (nanoseconds)

Definition chipset_timing_config.h:30

u32 reset_us

Reset/latch time (microseconds)

Definition chipset_timing_config.h:32

const char * name

Human-readable chipset name.

Definition chipset_timing_config.h:33

u32 t3_ns

T0L: Low tail duration (nanoseconds)

Definition chipset_timing_config.h:31