6#if SKETCH_HAS_LOTS_OF_MEMORY
11#include "platforms/is_platform.h"
16#include "freertos/FreeRTOS.h"
17#include "freertos/task.h"
18#include "soc/io_mux_reg.h"
19#include "soc/gpio_periph.h"
20#include "soc/gpio_reg.h"
24constexpr fl::u32 kMaxStamps = 200;
25volatile fl::u32 g_stamps[kMaxStamps];
26volatile fl::u32 g_count = 0;
27volatile fl::u32 g_selftest_edges = 0;
28volatile fl::u32 g_probe_state = 0;
29volatile fl::u32 g_rmt_live[8] = {0};
34static inline fl::u32 probeCycles() {
35 return static_cast<fl::u32
>(ESP.getCycleCount());
38void ARDUINO_ISR_ATTR edgeIsr() {
39 const fl::u32 i = g_count;
42 const fl::u32 lvl_now =
static_cast<fl::u32
>(
digitalRead(g_pin));
43 g_stamps[i] = ((lvl_now ^ 1u) << 31) | (probeCycles() & 0x7FFFFFFFu);
53 if (g_pin >= 0 && !passive) {
54 detachInterrupt(digitalPinToInterrupt(g_pin));
62 attachInterrupt(digitalPinToInterrupt(pin), edgeIsr, CHANGE);
70 for (
int i = 0; i < 4; ++i) {
76 g_selftest_edges = g_count;
85 xTaskCreate([](
void *arg) {
86 const int pin =
static_cast<int>(
reinterpret_cast<intptr_t>(arg));
88 vTaskDelay(pdMS_TO_TICKS(150));
89 PIN_INPUT_ENABLE(GPIO_PIN_MUX_REG[pin]);
95 volatile fl::u32 *in_reg;
98 in_reg =
reinterpret_cast<volatile fl::u32 *
>(GPIO_IN_REG);
101 mask = 1u << (pin - 32);
102 in_reg =
reinterpret_cast<volatile fl::u32 *
>(GPIO_IN1_REG);
104 mask = 1u << (pin & 31);
105 in_reg =
reinterpret_cast<volatile fl::u32 *
>(GPIO_IN_REG);
108 const fl::u32 idle = *in_reg & mask;
118 PIN_INPUT_ENABLE(GPIO_PIN_MUX_REG[pin]);
119 const fl::u32 b0 = probeCycles();
120 const fl::u32 lvl0 = *in_reg & mask;
121 while (probeCycles() - b0 < burst_cycles) {
122 if ((*in_reg & mask) != lvl0) {
triggered =
true;
break; }
130#if defined(CONFIG_IDF_TARGET_ESP32C6)
133 g_rmt_live[0] = *
reinterpret_cast<volatile fl::u32 *
>(0x60006038);
134 g_rmt_live[1] = *
reinterpret_cast<volatile fl::u32 *
>(0x60006030);
135 g_rmt_live[2] = *
reinterpret_cast<volatile fl::u32 *
>(0x60006034);
136 g_rmt_live[3] = *
reinterpret_cast<volatile fl::u32 *
>(0x6000601C);
137 g_rmt_live[6] = *
reinterpret_cast<volatile fl::u32 *
>(0x60091000 + 0x154 + 71 * 4);
138 g_rmt_live[7] = *
reinterpret_cast<volatile fl::u32 *
>(0x60091000 + 0x154 + 72 * 4);
141 fl::u32 prev = *in_reg & mask;
142 fl::u32 last_edge = probeCycles();
143 const fl::u32 start = last_edge;
146 const fl::u32 now = probeCycles();
147 if (now - start > budget)
break;
148 const fl::u32
cur = *in_reg & mask;
150 if (idx < kMaxStamps) {
151 g_stamps[idx] = ((prev ? 1u : 0u) << 31) | (now & 0x7FFFFFFFu);
159#if defined(CONFIG_IDF_TARGET_ESP32C6)
162 g_rmt_live[4] = *
reinterpret_cast<volatile fl::u32 *
>(0x60006038);
163 g_rmt_live[5] = *
reinterpret_cast<volatile fl::u32 *
>(0x60006030);
167 vTaskDelete(
nullptr);
168 },
"edgeprobe_rearm", 3072,
reinterpret_cast<void *
>(
static_cast<intptr_t>(pin)), 20,
nullptr);
173 return const_cast<const fl::u32 *
>(g_stamps);
180const fl::u32 *
edgeProbeRmtLive() {
return const_cast<const fl::u32 *
>(g_rmt_live); }
183 return static_cast<fl::u32
>(getCpuFrequencyMhz());
197struct EdgeProbeNoopState {
const fl::u32 * edgeProbeStamps(fl::u32 &count)
Timestamp buffer: entry = (level_before_edge << 31) | cycle_count.
fl::u32 edgeProbeState()
Probe task progress: 0=not started 1=started 2=triggered 3=sampled.
const fl::u32 * edgeProbeRmtLive()
RMT registers snapshotted at trigger time (INT_RAW, CH2STATUS, CH3STATUS, CH2_RX_CONF1).
fl::u32 edgeProbeSelfTestEdges()
Edges recorded by the arm-time pull-toggle self-test.
void edgeProbeArmMode(int pin, bool passive)
Passive variant: no pinMode/attachInterrupt/pull toggles — only the triggered tight-loop sampler task...
fl::u32 edgeProbeCpuMhz()
CPU frequency in MHz for cycle→ns conversion.
void edgeProbeArm(int pin)
Arm the probe on a pin (re-arming resets the buffer).
static T & instance() FL_NO_EXCEPT
PinValue digitalRead(int pin) FL_NO_EXCEPT
Read digital value from pin.
void pinMode(int pin, PinMode mode) FL_NO_EXCEPT
Set pin mode (input, output, pull-up, pull-down)
void delayMicroseconds(u32 us) FL_NO_EXCEPT
Delay for a given number of microseconds.