FastLED 3.9.15
Loading...
Searching...
No Matches
wiring.cpp.hpp
Go to the documentation of this file.
1#define FASTLED_INTERNAL
2#include "fl/system/fastled.h"
3
7
8
9#if 0
10
11#if defined(FASTLED_AVR) && !defined(FL_IS_TEENSY) && !defined(FL_IS_AVR_ATTINY)
12extern "C" {
13// the prescaler is set so that timer0 ticks every 64 clock cycles, and the
14// the overflow handler is called every 256 ticks.
15#define MICROSECONDS_PER_TIMER0_OVERFLOW (clockCyclesToMicroseconds(64 * 256))
16
17typedef union { unsigned long _long; fl::u8 raw[4]; } tBytesForLong;
18// tBytesForLong FastLED_timer0_overflow_count;
19volatile unsigned long FastLED_timer0_overflow_count=0;
20volatile unsigned long FastLED_timer0_millis = 0;
21
22LIB8STATIC void __attribute__((always_inline)) fastinc32 (volatile u32 & _long) {
23 fl::u8 b = ++((tBytesForLong&)_long).raw[0];
24 if(!b) {
25 b = ++((tBytesForLong&)_long).raw[1];
26 if(!b) {
27 b = ++((tBytesForLong&)_long).raw[2];
28 if(!b) {
29 ++((tBytesForLong&)_long).raw[3];
30 }
31 }
32 }
33}
34
35#if defined(FL_IS_AVR_ATTINY)
36ISR(TIM0_OVF_vect)
37#else
38ISR(TIMER0_OVF_vect)
39#endif
40{
41 fastinc32(FastLED_timer0_overflow_count);
42 // FastLED_timer0_overflow_count++;
43}
44
45// there are 1024 microseconds per overflow counter tick.
46unsigned long millis()
47{
48 unsigned long m;
49 fl::u8 oldSREG = SREG;
50
51 // disable interrupts while we read FastLED_timer0_millis or we might get an
52 // inconsistent value (e.g. in the middle of a write to FastLED_timer0_millis)
53 cli();
54 m = FastLED_timer0_overflow_count; //._long;
55 SREG = oldSREG;
56
57 return (m*(MICROSECONDS_PER_TIMER0_OVERFLOW/8))/(1000/8);
58}
59
60unsigned long micros() {
61 unsigned long m;
62 fl::u8 oldSREG = SREG, t;
63
64 cli();
65 m = FastLED_timer0_overflow_count; // ._long;
66#if defined(TCNT0)
67 t = TCNT0;
68#elif defined(TCNT0L)
69 t = TCNT0L;
70#else
71 #error TIMER 0 not defined
72#endif
73
74
75#ifdef TIFR0
76 if ((TIFR0 & _BV(TOV0)) && (t < 255))
77 ++m;
78#else
79 if ((TIFR & _BV(TOV0)) && (t < 255))
80 ++m;
81#endif
82
83 SREG = oldSREG;
84
85 return ((m << 8) + t) * (64 / clockCyclesPerMicrosecond());
86}
87
88void delay(unsigned long ms)
89{
90 fl::u16 start = (fl::u16)micros();
91
92 while (ms > 0) {
93 if (((fl::u16)micros() - start) >= 1000) {
94 --ms;
95 start += 1000;
96 }
97 }
98}
99
100#define sbi(sfr, bit) (_SFR_BYTE(sfr) |= _BV(bit))
101void init()
102{
103 // this needs to be called before setup() or some functions won't
104 // work there
105 sei();
106
107 // on the ATmega168, timer 0 is also used for fast hardware pwm
108 // (using phase-correct PWM would mean that timer 0 overflowed half as often
109 // resulting in different millis() behavior on the ATmega8 and ATmega168)
110#if defined(TCCR0A) && defined(WGM01)
111 sbi(TCCR0A, WGM01);
112 sbi(TCCR0A, WGM00);
113#endif
114
115 // set timer 0 prescale factor to 64
116#if defined(FL_IS_AVR_ATMEGA)
117 // CPU specific: different values for the ATmega128
118 sbi(TCCR0, CS02);
119#elif defined(TCCR0) && defined(CS01) && defined(CS00)
120 // this combination is for the standard atmega8
121 sbi(TCCR0, CS01);
122 sbi(TCCR0, CS00);
123#elif defined(TCCR0B) && defined(CS01) && defined(CS00)
124 // this combination is for the standard 168/328/1280/2560
125 sbi(TCCR0B, CS01);
126 sbi(TCCR0B, CS00);
127#elif defined(TCCR0A) && defined(CS01) && defined(CS00)
128 // this combination is for the __AVR_ATmega645__ series
129 sbi(TCCR0A, CS01);
130 sbi(TCCR0A, CS00);
131#else
132 #error Timer 0 prescale factor 64 not set correctly
133#endif
134
135 // enable timer 0 overflow interrupt
136#if defined(TIMSK) && defined(TOIE0)
137 sbi(TIMSK, TOIE0);
138#elif defined(TIMSK0) && defined(TOIE0)
139 sbi(TIMSK0, TOIE0);
140#else
141 #error Timer 0 overflow interrupt not set correctly
142#endif
143
144 // timers 1 and 2 are used for phase-correct hardware pwm
145 // this is better for motors as it ensures an even waveform
146 // note, however, that fast pwm mode can achieve a frequency of up
147 // 8 MHz (with a 16 MHz clock) at 50% duty cycle
148
149#if defined(TCCR1B) && defined(CS11) && defined(CS10)
150 TCCR1B = 0;
151
152 // set timer 1 prescale factor to 64
153 sbi(TCCR1B, CS11);
154#if F_CPU >= 8000000L
155 sbi(TCCR1B, CS10);
156#endif
157#elif defined(TCCR1) && defined(CS11) && defined(CS10)
158 sbi(TCCR1, CS11);
159#if F_CPU >= 8000000L
160 sbi(TCCR1, CS10);
161#endif
162#endif
163 // put timer 1 in 8-bit phase correct pwm mode
164#if defined(TCCR1A) && defined(WGM10)
165 sbi(TCCR1A, WGM10);
166#elif defined(TCCR1)
167 #warning this needs to be finished
168#endif
169
170 // set timer 2 prescale factor to 64
171#if defined(TCCR2) && defined(CS22)
172 sbi(TCCR2, CS22);
173#elif defined(TCCR2B) && defined(CS22)
174 sbi(TCCR2B, CS22);
175#else
176 #warning Timer 2 not finished (may not be present on this CPU)
177#endif
178
179 // configure timer 2 for phase correct pwm (8-bit)
180#if defined(TCCR2) && defined(WGM20)
181 sbi(TCCR2, WGM20);
182#elif defined(TCCR2A) && defined(WGM20)
183 sbi(TCCR2A, WGM20);
184#else
185 #warning Timer 2 not finished (may not be present on this CPU)
186#endif
187
188#if defined(TCCR3B) && defined(CS31) && defined(WGM30)
189 sbi(TCCR3B, CS31); // set timer 3 prescale factor to 64
190 sbi(TCCR3B, CS30);
191 sbi(TCCR3A, WGM30); // put timer 3 in 8-bit phase correct pwm mode
192#endif
193
194#if defined(TCCR4A) && defined(TCCR4B) && defined(TCCR4D) /* beginning of timer4 block for 32U4 and similar */
195 sbi(TCCR4B, CS42); // set timer4 prescale factor to 64
196 sbi(TCCR4B, CS41);
197 sbi(TCCR4B, CS40);
198 sbi(TCCR4D, WGM40); // put timer 4 in phase- and frequency-correct PWM mode
199 sbi(TCCR4A, PWM4A); // enable PWM mode for comparator OCR4A
200 sbi(TCCR4C, PWM4D); // enable PWM mode for comparator OCR4D
201#else /* beginning of timer4 block for ATMEGA1280 and ATMEGA2560 */
202#if defined(TCCR4B) && defined(CS41) && defined(WGM40)
203 sbi(TCCR4B, CS41); // set timer 4 prescale factor to 64
204 sbi(TCCR4B, CS40);
205 sbi(TCCR4A, WGM40); // put timer 4 in 8-bit phase correct pwm mode
206#endif
207#endif /* end timer4 block for ATMEGA1280/2560 and similar */
208
209#if defined(TCCR5B) && defined(CS51) && defined(WGM50)
210 sbi(TCCR5B, CS51); // set timer 5 prescale factor to 64
211 sbi(TCCR5B, CS50);
212 sbi(TCCR5A, WGM50); // put timer 5 in 8-bit phase correct pwm mode
213#endif
214
215#if defined(ADCSRA)
216 // set a2d prescale factor to 128
217 // 16 MHz / 128 = 125 KHz, inside the desired 50-200 KHz range.
218 // XXX: this will not work properly for other clock speeds, and
219 // this code should use F_CPU to determine the prescale factor.
220 sbi(ADCSRA, ADPS2);
221 sbi(ADCSRA, ADPS1);
222 sbi(ADCSRA, ADPS0);
223
224 // enable a2d conversions
225 sbi(ADCSRA, ADEN);
226#endif
227
228 // the bootloader connects pins 0 and 1 to the USART; disconnect them
229 // here so they can be used as normal digital i/o; they will be
230 // reconnected in Serial.begin()
231#if defined(UCSRB)
232 UCSRB = 0;
233#elif defined(UCSR0B)
234 UCSR0B = 0;
235#endif
236}
237};
238#endif
239
240#endif
static uint32_t t
Definition Luminova.h:55
Internal FastLED header for implementation files.
#define LIB8STATIC
Define a LIB8TION member function as static inline with an "unused" attribute.
Definition lib8static.h:12
unsigned char u8
Definition stdint.h:131