Detailed Description
Full PARLIO encode bench for ESP32-P4 (post-byte-LUT, #2526 landed).
Measures the engine's per-byte-position hot path — 16-lane gather + wave8Transpose_16 + memcpy 128 B to DMA output — with the source scratch and the DMA output each in SRAM or PSRAM (4 combinations). Frame-equivalent is x768 byte-positions, which matches the 16-channel × 256-LED × 3-byte production frame size on the attached P4 EV board.
Two questions this bench answers:
- Is encode now fast enough for ISR-driven chunked streaming? At 800 kHz WS2812B with 16 lanes in parallel, one frame transmits in
256 * 24 * 1.25 us = 7680 us. If frame encode < 7680 us, the CPU can keep ahead of the DMA stream and chunked streaming works. - Is the PSRAM hypothesis (PSRAM is the bottleneck) correct? Compare SRAM-scratch / SRAM-output vs PSRAM variants. Prior memory indicates the P4 L2 cache fully hides PSRAM latency for this access pattern (×1.00 SRAM vs PSRAM); this rechecks on the byte-LUT version.
Invocation: RPC-only via parlioEncodeBenchmark in AutoResearchRemote.cpp. The result struct is JSON-serialized by the RPC handler; this header no longer prints directly.
Current implementation times the production BF1 pipe4 encode path and skips PSRAM-only placements when PSRAM is not present.
Definition in file AutoResearchParlioEncode.h.
#include "fl/channels/detail/wave8.hpp"#include "fl/channels/wave8.h"#include "fl/chipsets/led_timing.h"#include "fl/log/log.h"#include "fl/stl/bit_cast.h"#include "fl/stl/int.h"#include "fl/stl/cstring.h"
Include dependency graph for AutoResearchParlioEncode.h: This graph shows which files directly or indirectly include this file:Go to the source code of this file.
Classes | |
| struct | autoresearch::parlio_bench::ParlioEncodeResult |
Namespaces | |
| namespace | autoresearch |
| namespace | autoresearch::parlio_bench |
Macros | |
| #define | FL_PARLIO_BENCH_ENABLED 0 |
Functions | |
| ParlioEncodeResult | autoresearch::parlio_bench::measureParlioEncode (int=12000) |
