FastLED 3.9.15
Loading...
Searching...
No Matches
fl::RxConfig Struct Reference

Detailed Description

Configuration for RX device initialization.

Struct-based configuration allows future extensibility without breaking API compatibility.

Hardware Parameters:

  • buffer_size: Buffer size (symbols for RMT, edges for ISR)
  • hz: Optional clock frequency (only used for RMT, defaults to platform default: 40MHz on ESP32)

Edge Detection: The edge detection feature solves the "spurious LOW capture" problem where RX devices capture the idle pin state (LOW) before TX starts transmitting. By detecting the first rising edge (LOW→HIGH) or falling edge (HIGH→LOW), we can skip pre-transmission noise and start decoding from actual data.

Example:

RxConfig config;
config.buffer_size = 512; // Buffer size
config.hz = 1000000; // Optional: 1MHz clock (RMT only)
config.signal_range_min_ns = 100;
config.signal_range_max_ns = 100000;
config.skip_signals = 0;
config.start_low = true; // Pin idle state is LOW (WS2812B default)
rx->begin(config);
u32 skip_signals
Number of signals to skip before capturing (default: 0)
Definition rx.h:224
u32 signal_range_min_ns
Minimum pulse width (glitch filter, default: 100ns)
Definition rx.h:222
size_t buffer_size
Buffer size in symbols/edges (default: 512)
Definition rx.h:218
bool start_low
Pin idle state: true=LOW (WS2812B), false=HIGH (inverted)
Definition rx.h:225
u32 signal_range_max_ns
Maximum pulse width (idle threshold, default: 100μs)
Definition rx.h:223
fl::optional< u32 > hz
Optional clock frequency (RMT only, default: 40MHz)
Definition rx.h:219
constexpr RxConfig() FL_NOEXCEPT=default
Default constructor with common WS2812B defaults.

Definition at line 216 of file rx.h.

#include <rx.h>

+ Collaboration diagram for fl::RxConfig:

Public Member Functions

constexpr RxConfig () FL_NOEXCEPT=default
 Default constructor with common WS2812B defaults.
 

Public Attributes

size_t buffer_size = 512
 Buffer size in symbols/edges (default: 512)
 
fl::optional< u32 > hz = fl::nullopt
 Optional clock frequency (RMT only, default: 40MHz)
 
bool io_loop_back = false
 Enable internal RMT loopback (RMT only, default: false)
 
u32 signal_range_max_ns = 100000
 Maximum pulse width (idle threshold, default: 100μs)
 
u32 signal_range_min_ns = 100
 Minimum pulse width (glitch filter, default: 100ns)
 
u32 skip_signals = 0
 Number of signals to skip before capturing (default: 0)
 
bool start_low = true
 Pin idle state: true=LOW (WS2812B), false=HIGH (inverted)
 
bool use_dma = false
 Use DMA streaming for RX (RMT only, default: false)
 

The documentation for this struct was generated from the following file: