FastLED 3.9.3
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wiring.cpp
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1#define FASTLED_INTERNAL
2#include "FastLED.h"
3
7
8FASTLED_USING_NAMESPACE
9
10#if 0
11
12#if defined(FASTLED_AVR) && !defined(TEENSYDUINO) && !defined(LIB8_ATTINY)
13extern "C" {
14// the prescaler is set so that timer0 ticks every 64 clock cycles, and the
15// the overflow handler is called every 256 ticks.
16#define MICROSECONDS_PER_TIMER0_OVERFLOW (clockCyclesToMicroseconds(64 * 256))
17
18typedef union { unsigned long _long; uint8_t raw[4]; } tBytesForLong;
19// tBytesForLong FastLED_timer0_overflow_count;
20volatile unsigned long FastLED_timer0_overflow_count=0;
21volatile unsigned long FastLED_timer0_millis = 0;
22
23LIB8STATIC void __attribute__((always_inline)) fastinc32 (volatile uint32_t & _long) {
24 uint8_t b = ++((tBytesForLong&)_long).raw[0];
25 if(!b) {
26 b = ++((tBytesForLong&)_long).raw[1];
27 if(!b) {
28 b = ++((tBytesForLong&)_long).raw[2];
29 if(!b) {
30 ++((tBytesForLong&)_long).raw[3];
31 }
32 }
33 }
34}
35
36#if defined(__AVR_ATtiny24__) || defined(__AVR_ATtiny44__) || defined(__AVR_ATtiny84__)
37ISR(TIM0_OVF_vect)
38#else
39ISR(TIMER0_OVF_vect)
40#endif
41{
42 fastinc32(FastLED_timer0_overflow_count);
43 // FastLED_timer0_overflow_count++;
44}
45
46// there are 1024 microseconds per overflow counter tick.
47unsigned long millis()
48{
49 unsigned long m;
50 uint8_t oldSREG = SREG;
51
52 // disable interrupts while we read FastLED_timer0_millis or we might get an
53 // inconsistent value (e.g. in the middle of a write to FastLED_timer0_millis)
54 cli();
55 m = FastLED_timer0_overflow_count; //._long;
56 SREG = oldSREG;
57
58 return (m*(MICROSECONDS_PER_TIMER0_OVERFLOW/8))/(1000/8);
59}
60
61unsigned long micros() {
62 unsigned long m;
63 uint8_t oldSREG = SREG, t;
64
65 cli();
66 m = FastLED_timer0_overflow_count; // ._long;
67#if defined(TCNT0)
68 t = TCNT0;
69#elif defined(TCNT0L)
70 t = TCNT0L;
71#else
72 #error TIMER 0 not defined
73#endif
74
75
76#ifdef TIFR0
77 if ((TIFR0 & _BV(TOV0)) && (t < 255))
78 ++m;
79#else
80 if ((TIFR & _BV(TOV0)) && (t < 255))
81 ++m;
82#endif
83
84 SREG = oldSREG;
85
86 return ((m << 8) + t) * (64 / clockCyclesPerMicrosecond());
87}
88
89void delay(unsigned long ms)
90{
91 uint16_t start = (uint16_t)micros();
92
93 while (ms > 0) {
94 if (((uint16_t)micros() - start) >= 1000) {
95 --ms;
96 start += 1000;
97 }
98 }
99}
100
101#define sbi(sfr, bit) (_SFR_BYTE(sfr) |= _BV(bit))
102void init()
103{
104 // this needs to be called before setup() or some functions won't
105 // work there
106 sei();
107
108 // on the ATmega168, timer 0 is also used for fast hardware pwm
109 // (using phase-correct PWM would mean that timer 0 overflowed half as often
110 // resulting in different millis() behavior on the ATmega8 and ATmega168)
111#if defined(TCCR0A) && defined(WGM01)
112 sbi(TCCR0A, WGM01);
113 sbi(TCCR0A, WGM00);
114#endif
115
116 // set timer 0 prescale factor to 64
117#if defined(__AVR_ATmega128__)
118 // CPU specific: different values for the ATmega128
119 sbi(TCCR0, CS02);
120#elif defined(TCCR0) && defined(CS01) && defined(CS00)
121 // this combination is for the standard atmega8
122 sbi(TCCR0, CS01);
123 sbi(TCCR0, CS00);
124#elif defined(TCCR0B) && defined(CS01) && defined(CS00)
125 // this combination is for the standard 168/328/1280/2560
126 sbi(TCCR0B, CS01);
127 sbi(TCCR0B, CS00);
128#elif defined(TCCR0A) && defined(CS01) && defined(CS00)
129 // this combination is for the __AVR_ATmega645__ series
130 sbi(TCCR0A, CS01);
131 sbi(TCCR0A, CS00);
132#else
133 #error Timer 0 prescale factor 64 not set correctly
134#endif
135
136 // enable timer 0 overflow interrupt
137#if defined(TIMSK) && defined(TOIE0)
138 sbi(TIMSK, TOIE0);
139#elif defined(TIMSK0) && defined(TOIE0)
140 sbi(TIMSK0, TOIE0);
141#else
142 #error Timer 0 overflow interrupt not set correctly
143#endif
144
145 // timers 1 and 2 are used for phase-correct hardware pwm
146 // this is better for motors as it ensures an even waveform
147 // note, however, that fast pwm mode can achieve a frequency of up
148 // 8 MHz (with a 16 MHz clock) at 50% duty cycle
149
150#if defined(TCCR1B) && defined(CS11) && defined(CS10)
151 TCCR1B = 0;
152
153 // set timer 1 prescale factor to 64
154 sbi(TCCR1B, CS11);
155#if F_CPU >= 8000000L
156 sbi(TCCR1B, CS10);
157#endif
158#elif defined(TCCR1) && defined(CS11) && defined(CS10)
159 sbi(TCCR1, CS11);
160#if F_CPU >= 8000000L
161 sbi(TCCR1, CS10);
162#endif
163#endif
164 // put timer 1 in 8-bit phase correct pwm mode
165#if defined(TCCR1A) && defined(WGM10)
166 sbi(TCCR1A, WGM10);
167#elif defined(TCCR1)
168 #warning this needs to be finished
169#endif
170
171 // set timer 2 prescale factor to 64
172#if defined(TCCR2) && defined(CS22)
173 sbi(TCCR2, CS22);
174#elif defined(TCCR2B) && defined(CS22)
175 sbi(TCCR2B, CS22);
176#else
177 #warning Timer 2 not finished (may not be present on this CPU)
178#endif
179
180 // configure timer 2 for phase correct pwm (8-bit)
181#if defined(TCCR2) && defined(WGM20)
182 sbi(TCCR2, WGM20);
183#elif defined(TCCR2A) && defined(WGM20)
184 sbi(TCCR2A, WGM20);
185#else
186 #warning Timer 2 not finished (may not be present on this CPU)
187#endif
188
189#if defined(TCCR3B) && defined(CS31) && defined(WGM30)
190 sbi(TCCR3B, CS31); // set timer 3 prescale factor to 64
191 sbi(TCCR3B, CS30);
192 sbi(TCCR3A, WGM30); // put timer 3 in 8-bit phase correct pwm mode
193#endif
194
195#if defined(TCCR4A) && defined(TCCR4B) && defined(TCCR4D) /* beginning of timer4 block for 32U4 and similar */
196 sbi(TCCR4B, CS42); // set timer4 prescale factor to 64
197 sbi(TCCR4B, CS41);
198 sbi(TCCR4B, CS40);
199 sbi(TCCR4D, WGM40); // put timer 4 in phase- and frequency-correct PWM mode
200 sbi(TCCR4A, PWM4A); // enable PWM mode for comparator OCR4A
201 sbi(TCCR4C, PWM4D); // enable PWM mode for comparator OCR4D
202#else /* beginning of timer4 block for ATMEGA1280 and ATMEGA2560 */
203#if defined(TCCR4B) && defined(CS41) && defined(WGM40)
204 sbi(TCCR4B, CS41); // set timer 4 prescale factor to 64
205 sbi(TCCR4B, CS40);
206 sbi(TCCR4A, WGM40); // put timer 4 in 8-bit phase correct pwm mode
207#endif
208#endif /* end timer4 block for ATMEGA1280/2560 and similar */
209
210#if defined(TCCR5B) && defined(CS51) && defined(WGM50)
211 sbi(TCCR5B, CS51); // set timer 5 prescale factor to 64
212 sbi(TCCR5B, CS50);
213 sbi(TCCR5A, WGM50); // put timer 5 in 8-bit phase correct pwm mode
214#endif
215
216#if defined(ADCSRA)
217 // set a2d prescale factor to 128
218 // 16 MHz / 128 = 125 KHz, inside the desired 50-200 KHz range.
219 // XXX: this will not work properly for other clock speeds, and
220 // this code should use F_CPU to determine the prescale factor.
221 sbi(ADCSRA, ADPS2);
222 sbi(ADCSRA, ADPS1);
223 sbi(ADCSRA, ADPS0);
224
225 // enable a2d conversions
226 sbi(ADCSRA, ADEN);
227#endif
228
229 // the bootloader connects pins 0 and 1 to the USART; disconnect them
230 // here so they can be used as normal digital i/o; they will be
231 // reconnected in Serial.begin()
232#if defined(UCSRB)
233 UCSRB = 0;
234#elif defined(UCSR0B)
235 UCSR0B = 0;
236#endif
237}
238};
239#endif
240
241#endif
242
central include file for FastLED, defines the CFastLED class/object